Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

What you'll do

• Architect and deploy distributed multi-agent AI frameworks to automate memory design workflows for PPA and yield.
• Orchestrate autonomous agent executions for multi-step reasoning and task decomposition across silicon bring-up and yield analysis.
• Integrate LLM-driven agent pipelines with EDA suites, custom software tools, and enterprise data repositories.
• Develop ML models to automate the classification of scan failures and correlate them with DFT structures.
• Build predictive yield models by integrating high-dimensional data from Fab process parameters and E-test data.
• Distill hardware engineering methodologies into modular, goal-driven agentic workflows for memory design leads.
• Establish evaluation metrics, testing benchmarks, and safety guardrails for non-deterministic AI systems.
• Manage cloud-native containerized orchestration pipelines using Docker, Kubernetes, and Vector Databases.

What we're looking for

• Master’s degree or Ph.D. in Electrical Engineering or Computer Engineering.
• 15+ years of progressive experience in memory design, DFT, silicon yield analysis, software architecture, and AI systems engineering.
• Experience designing and characterizing embedded memory in advanced technology process nodes.
• Experience in compute-in-memory design and architecture.
• Experience architecting production-grade LLM applications including multi-agent orchestration, function-calling, and RAG.
• Deep experience with agent orchestration frameworks such as LangGraph.
• High proficiency in Python and TCL with expertise in microservices, Docker, Kubernetes, and REST APIs.
• Hands-on familiarity with Synopsys, Cadence, and Siemens EDA tools, plus System Verilog and UVM environments.