FPGA Design Engineer

Lockheed Martin

Quick summary

Work type: On-site
Location: Boulder, CO
Salary: $82,900–$146,165 / yr
Posted: 3 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k

This role $115k

$66k most similar roles pay here $237k

This role pays less than 99% of similar roles. Most pay $158,850–$213,543 — the shaded band above. At the midpoint, this role pays about $115k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Lockheed Martin

Lockheed Martin is a global aerospace, defense, and security company that designs, develops, and manufactures advanced technology systems, products, and services for government and commercial customers worldwide.

Lockheed Martin currently has 611 open roles on FindRole.

Listed pay typically runs $101,000–$178,135 across 304 roles with salary data.

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At a glance

TL;DR · FPGA Design Engineer

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Lockheed Martin Space seeks a Field Programmable Gate Array (FPGA) Design Engineer to join the APEX team in Boulder, Colorado. This senior-level position involves evolving ground-based mission processing applications onto flight hardware for onboard operations, focusing on remote sensing payloads. The FPGA Design Engineer will use Vivado and Vitis platforms, including High-Level Synthesis, alongside VHDL and Verilog to deploy algorithms and code onto flight hardware. Key responsibilities include developing and testing processor subsystem features, generating requirements, and contributing to FPGA development workflows using both traditional RTL design and HLS methodologies. Candidates should have a strong background in HDL languages, experience with Vivado, and proficiency in C++ and Matlab. Desired skills encompass digital logic design, interfacing FPGAs with processors, and familiarity with Xilinx platforms and tools, as well as embedded Linux environments.

Skills

Vivado Verilog VHDL Xilinx Vitis High-Level Synthesis (HLS) C++ Matlab FPGA Vitis Model Composer Matlab HDL Coder embedded software development embedded Linux Yocto

What you'll do

Develop and implement mission processing code from C++ to hardware using VHDL and Verilog.
Integrate and test processor subsystem features and interfaces in FPGA hardware for space missions.
Generate requirements, create FPGA code, and develop test benches for verification.
Contribute to FPGA development workflows using both traditional RTL design and High-Level Synthesis (HLS).
Collaborate with research scientists and software engineers on the APEX team for mission processing projects.

What we're looking for

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
Ability to obtain TS/SCI clearance.
Proficiency with HDL languages (VHDL & Verilog).
Experience designing and testing FPGA hardware using Vivado Design Suite.
Familiarity with Xilinx Vitis platform for High-Level Synthesis (HLS) development.
Digital logic design experience and knowledge of FPGA concepts.

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