FPGA Design Engineer Lead

Lockheed Martin

Hybrid

Quick summary

Work type
Hybrid
Location
Orlando, FL
Posted
3 days ago
Nearby
99+ roles within 25 mi

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Similar $188k
$135k most similar roles pay here $230k

This listing doesn't post a salary. Most similar roles pay $161,725–$214,050.

Based on 240 similar postings.

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About Lockheed Martin

Lockheed Martin is a global aerospace, defense, and security company that designs, develops, and manufactures advanced technology systems, products, and services for government and commercial customers worldwide.

Lockheed Martin currently has 611 open roles on FindRole.

Listed pay typically runs $101,000–$178,135 across 304 roles with salary data.

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At a glance

TL;DR · FPGA Design Engineer Lead

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As the FPGA Design Engineer Lead for the Programmable Logic Design organization within Missiles & Fire Control at Lockheed Martin, you will serve as a technical authority responsible for end-to-end development of sophisticated FPGA/ASIC architectures. Your daily tasks include translating system requirements into production-ready designs, conducting trade studies to optimize device selection, and creating detailed documentation that guides cross-functional teams. You will also build high-coverage verification environments using UVM and support Design Assurance Reviews while ensuring compliance with aerospace standards. Additionally, you will mentor junior engineers, manage configuration control in GitLab repositories, and represent FPGA/ASIC engineering in technical meetings. This role requires proficiency in VHDL/Verilog, experience with multiple FPGA vendors’ toolchains, and a strong understanding of digital design principles.

Skills

VHDL Verilog SystemVerilog UVM GitLab Xilinx Vivado AMD Vivado Synopsys VCS Git C C++ MATLAB Simulink Synplify NCSim ChipScope Simulink HDL Coder CI/CD

What you'll do

  • Lead end-to-end FPGA/ASIC development from requirements to production release.
  • Design and implement logic using VHDL/Verilog in AMD Vivado or equivalent tools.
  • Conduct trade studies to optimize device selection based on performance criteria.
  • Create detailed interface control documents for cross-functional team guidance.
  • Build high coverage verification environments with UVM and generate test plans.
  • Provide technical leadership, mentorship, and code review guidance to engineers.

What we're looking for

  • Bachelor’s degree in Electrical Engineering or related STEM field; advanced degree preferred.
  • Proficiency in VHDL/Verilog/SystemVerilog for FPGA development.
  • Experience with multiple FPGA vendors and their toolchains (Vivado, Quartus).
  • Familiarity with UVM verification methodologies and simulation tools like VCS.
  • Must be a US citizen with or able to obtain DoD Secret clearance.
  • Strong understanding of digital design principles including timing analysis.
  • Experience in hardware-software integration and validation processes.

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