Embedded SoC Architect in San Jose, California | Advanced Micro Devices, Inc

Amd

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$166,400–$166,400 / yr
Posted
113 days ago
Closes
Feb 26, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $166k
$154k most similar roles pay here $229k

This role pays less than 68% of similar roles. Most pay $162,800–$221,700 — the shaded band above. At the midpoint, this role pays about $166k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 71 open roles on FindRole.

Listed pay typically runs $178,400–$178,400 across 71 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Embedded SoC Architect in San Jose, California | Advanced Micro Devices, Inc

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The AMD Adaptive Embedded Computing Group seeks a Senior SoC Architect to drive the development of next-generation adaptive and embedded System-on-Chips (SoCs) across various applications including AI/ML, automotive, aerospace, and data centers. This role involves collaborating closely with customers, partners, and internal teams to define innovative SoC architectures that integrate processors, accelerators, and I/O subsystems while optimizing power consumption and cost. Key responsibilities include creating flexible modular subsystem designs for chiplet, monolithic, or 3D form factors, defining hardware-software interactions, and authoring clear architecture specifications. Preferred candidates have extensive experience in SoC design with expertise in x86, RISC-V, ARM cores, PCIe, Ethernet, and FPGA technologies, as well as knowledge of boot, security, and debug protocols.

Skills

x86 RISC-V ARM PCIe Ethernet DDR FPGA AI/ML AXI CI/CD Python C++ SystemVerilog UVM Linux RTOS VHDL Verilog Git JIRA

What you'll do

  • Drive the creation of low-power, cost-effective SoC architectures with processor and I/O subsystems.
  • Define flexible modular subsystem architectures for chiplet, monolithic, or 3D form factors.
  • Collaborate with cross-functional teams to scope SoC requirements and analyze PPA tradeoffs.
  • Author clear architecture specifications guiding pre-silicon design/verification and post-silicon validation.
  • Define hardware, software, and firmware interactions between embedded processing subsystems and accelerators.

What we're looking for

  • Extensive experience in SoC architecture design and optimization.
  • Deep understanding of processor cores (x86, RISC-V, ARM) and I/O protocols (PCIe, Ethernet).
  • Expertise in defining hardware-software interactions for embedded processing subsystems.
  • Strong background in at least one industry domain: embedded computing, data center, automotive, aerospace.
  • Knowledge of FPGA and AI/ML accelerators preferred.
  • Ability to create flexible modular subsystem architectures for various form factors.

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