Design Verification Tech Lead Engineer

Amazon Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$185,200–$250,000 / yr
Posted
98 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $179k
This role $218k
$131k most similar roles pay here $263k

This role pays more than 92% of similar roles. Most pay $161,500–$195,887 — the shaded band above. At the midpoint, this role pays about $218k versus about $179k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 535 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 533 roles with salary data.

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At a glance

TL;DR · Design Verification Tech Lead Engineer

Design Verification Tech Lead Engineer, Amazon Leo will join the sub-team responsible for defining and implementing digital chip SOCs for communication via low Earth orbit satellites and gateways. This role involves building a state of the art verification environment for modem IP and subsystems to facilitate testing against reference Matlab or C models. The engineer will develop detailed test plans, write tests, run regressions, collect coverage matrices, and build highly automated environments to triage regression fails. Key responsibilities include debugging system level communication scenarios in both pre-silicon and post-silicon environments. Required technical skills include UVM, C, SystemC, and scripting experience. The role focuses on the development of modems, high-speed interfaces, embedded processors, and DSP solutions using latest CMOS generation technologies to solve complex wireless communication problems for satellite networks.

What you'll do

  • Implement a state-of-the-art verification environment for modem IP and subsystems.
  • Test the device of interest against reference Matlab and C models.
  • Develop detailed test plans, write tests, and run regression suites.
  • Collect coverage matrices and report progress to program stakeholders.
  • Debug system-level communication scenarios in both pre-silicon and post-silicon environments.
  • Perform system-level verification using test benches built with UVM, SystemC, and DPI-C.
  • Develop highly automated environments to triage regression failures and report issues.

What we're looking for

  • Bachelor's degree in Electrical or Communications Engineering or a related field.
  • 3+ years of experience with UVM, C, SystemC, and scripting.
  • 7+ years of experience in verification (preferably in communication systems).
  • Must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
  • Master's or Ph.D. degree in Electrical or Communications Engineering (preferred).
  • 10+ years of experience in digital verification, preferably in communication systems (preferred).
  • Experience with Matlab, modem design verification, and formal verification techniques (preferred).
  • Strong written and verbal communication skills (preferred).

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