CPU Microarchitect/RTL Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $129,300–$194,700 / yr
Posted: 16 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $216k

This role $162k

$113k most similar roles pay here $286k

This role pays less than 85% of similar roles. Most pay $181,000–$250,000 — the shaded band above. At the midpoint, this role pays about $162k versus about $216k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · CPU Microarchitect/RTL Engineer

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The CPU Microarchitect/RTL Engineer joins the Silicon Engineering Group to drive multi-level cache subsystem architecture and RTL development for multi-processor systems. This role involves micro-architecture development from high-level exploration through detailed specification, alongside RTL ownership focused on refining designs to meet power, performance, area, and timing goals. The engineer will perform performance exploration, support verification teams with test bench development and formal methods, and collaborate with cross-functional teams for physical design implementation. Required skills include proficiency in Verilog or VHDL, while preferred qualifications include experience in C, C++, Perl, or Python. Technical expertise may involve instruction fetch, branch prediction, out-of-order execution, cache subsystems, machine-learning hardware mapping, and low-power microarchitecture techniques. The role addresses the technical challenge of designing high-performance, low-power microprocessors for a variety of mobile and desktop devices.

Skills

RTL Verilog VHDL C C++ Python Perl Microarchitecture Formal Verification Simulation Emulation Out-of-Order Execution machine-learning

What you'll do

Develop and specify micro-architecture from high-level exploration through detailed technical specifications.
Own the RTL design process by developing, assessing, and refining code to meet power, performance, area, and timing goals.
Support the verification team with test bench development, formal methods, and simulation/emulation for formal verification.
Explore high-performance strategies and correlate results with the performance verification team to ensure designs meet targets.
Implement and verify physical design aspects including timing, area, reliability, testability, and power.
Drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.

What we're looking for

Minimum of a Bachelor's degree.
Experience with Verilog or VHDL.
Expertise in areas such as instruction fetch, branch prediction, out-of-order execution, or cache and memory subsystems (preferred).
Understanding of low power microarchitecture techniques (preferred).
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture (preferred).
Experience in C or C++ programming (preferred).
Experience using an interpretive language such as Perl or Python (preferred).