ASIC Power Engineer

Apple Inc

Quick summary

Work type: On-site
Location: San Francisco, CA
Salary: $181,100–$318,400 / yr
Posted: 52 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k

This role $250k

$127k most similar roles pay here $339k

This role pays more than 91% of similar roles. Most pay $165,250–$216,250 — the shaded band above. At the midpoint, this role pays about $250k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · ASIC Power Engineer

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As an ASIC Power Engineer in our wireless SOC organization, you will play a pivotal role in developing highly energy-efficient silicon solutions that enhance user experiences on a global scale. Your responsibilities include defining power-efficient SOC architecture, writing power specifications, estimating pre-silicon power consumption, and building accurate atomic power models for wireless communication SoCs. You will also generate power vectors with design and DV support, collect pre-silicon power data using advanced tools like PTPX and Power Artist, analyze power reductions, and ensure post-silicon power correlation. This role requires a strong background in ASIC power knowledge, proficiency in scripting languages such as Shell or Python, and an understanding of low-power design principles including UPF. Experience with wireless technologies like Wi-Fi, Bluetooth, and UWB is highly desirable, along with familiarity with common SOC components and system architecture.

Skills

PTPX Power_Artist Python UPF Shell Perl ASIC low_power_design STA Wireless WIFI BT UWB PCIe CPU fabric peripherals

What you'll do

Define power-efficient SOC architecture and write power specifications.
Estimate pre-silicon power consumption with high accuracy.
Build wireless application and atomic power models.
Collect and analyze pre-silicon power data using specialized tools.
Identify opportunities for power reduction in designs.
Support post-silicon power correlation efforts.

What we're looking for

10+ years of relevant experience in ASIC design or related field.
Expertise in low-power design and UPF (Unified Power Format).
Proficiency with power tools such as PTPX and Power Artist.
Strong scripting skills in Shell, Perl, or Python.
Comprehensive understanding of SOC components including CPU, fabric, peripherals.
Ability to estimate pre-silicon power and build high-accuracy power models.

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