Join Cisco Silicon One as a senior ASIC design engineer and become part of a highly specialized team developing complex silicon devices for high-performance networking products. You will take end-to-end ownership of front-end ASIC subsystems, contributing to multi-disciplined engineering teams to meet power, performance, and area goals. Your daily tasks include designing high-frequency, high-performance RTL in Verilog/SystemVerilog, leading technical reviews, collaborating with verification and physical design teams, and mentoring engineers. You will work on challenging problems for hyperscale infrastructure, driving robust silicon delivery across architecture, design, verification, and implementation phases. Essential skills include extensive ASIC design experience, expertise in high-performance RTL using Verilog/SystemVerilog, and deep knowledge of timing closure and power optimization techniques. Ideal candidates have a background in electrical engineering with significant ASIC development experience at advanced technology nodes.
Define and design end-to-end Front-End ownership of ASIC subsystems for Cisco platforms.
Implement high-frequency, high-performance RTL in Verilog/SystemVerilog to meet strict targets.
Lead technical reviews and drive execution across architecture, verification, and physical implementation teams.
Mentor engineers and enhance engineering rigor, quality, and technical execution within the team.
Conduct debug and root-cause analysis for simulation, system bring-up, and post-silicon validation issues.
What we're looking for
Bachelor's degree in Electrical Engineering with 8+ years of ASIC design experience.
Strong expertise in high-performance RTL design using Verilog/SystemVerilog.
Deep understanding of timing closure, power optimization, and clock gating techniques.
Experience delivering silicon from microarchitecture through tape-out at advanced nodes.
Mentor engineers and lead technical reviews to ensure high-quality implementation.
Collaborate with verification and physical design teams to resolve integration challenges.
Influence system architecture and key design decisions across complex ASIC subsystems.
Market check
Salary context
This
$183,800–$263,600
range sits above
83%
of similar postings on FindRole.
Peer median band
$148,300–$218,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$153,437–$216,250
Middle half of comparable postings.
Based on 240 comparable postings.*
* 240 is the maximum number of comparable postings sampled.
Employer
About Cisco
Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity
Cisco currently has
103 open roles
on FindRole.
Listed pay typically runs
$165,000–$241,400
across 103 roles with salary data.