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Chip Lead, Silicon Co-Design Group

Nvidia

Santa Clara, CA 4 days ago $196,000–$310,500
Actively hiring Posted this week Verified listing Above market
SoC ASIC HBM SerDes power_and_thermal packaging CI/CD PostgreSQL Git JIRA Confluence AWS Kubernetes Docker Prometheus Grafana Python Shell_scripting AI_tools SVN
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Design Engineer - Chip Floorplanner

Broadcom

Fort Collins, CO 25 days ago $127,100–$203,400
Actively hiring Verified listing Below market
TCL Linux Python Perl Ruby Cadence VLSI ASIC floorplanning die partitioning hierarchical design PLLs clock networks power delivery timing-critical structures physical verification DRC LVS congestion analysis power analysis PPA optimization
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Senior C++ Software Engineer - Chip Design Tools

Nvidia

Santa Clara, CA 30 days ago $152,000–$241,500
Actively hiring Above market
C++ Golang Unix/Linux VLSI frontend design and verification RTL design Modern C++ Compiler Build systems Database Static code analysis Dynamic code analysis
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AI Chip Design Engineer - New College Grad 2026

Nvidia

Santa Clara, CA 67 days ago $116,000–$189,750
Actively hiring Below market
Python LangChain LangGraph AutoGen CrewAI RAGs vector databases prompt engineering knowledge graphs Verilog System Verilog temporal logic assertions RFL GPU architectures CPU architectures HW verification methodologies
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