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Active Keyword: Chip Design Remove filter Clear all

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Principal 3D Memory Chip Architect and Design Engineer

Qualcomm

San Diego, CA 9 days ago $200,000–$300,000
Actively hiring Confirmed live 2 days ago High trust Above market
3D Memory ASIC Design RTL Verilog Verilog-A Verilog-AMS C C++ Python Perl Matlab EDA Tools HBM3/4 LPDDR PCIe UCIe UAL SRAM DRAM FLASH 2.5D/3D Integration
8+ yrs exp
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Principal 3D Memory Chip Architect and Design Engineer

Qualcomm

San Diego, CA 9 days ago $200,000–$300,000
Actively hiring Confirmed live 2 days ago High trust Above market
3D Memory ASIC Design RTL Verilog Verilog-A Verilog-AMS SoC Architecture HBM3/4 LPDDR PCIe UCIe Python C++ Matlab EDA Tools Mixed-Signal Design Performance Modeling
8+ yrs exp
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Applied Research Engineer, Chip Design

Nvidia

Santa Clara, CA 65 days ago $192,000–$304,750
Actively hiring Confirmed live 2 days ago High trust Above market
LLM ASIC Design RTL Formal Verification RLHF SFT DPO Docker Slurm CI/CD Synthetic Data Model Training
8+ yrs exp Hybrid
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Senior C++ Software Engineer, Chip Design Tools

Nvidia

Santa Clara, CA +3 81 days ago $152,000–$241,500
Actively hiring Confirmed live 2 days ago High trust Competitive pay
C++ Golang Unix Linux Verilog VLSI Compiler Build Systems Database Dynamic Code Analysis Domain-Specific Languages (DSLs) Computer Architecture RTL Design
5+ yrs exp
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