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C C++ Python ARMv8 ARMv9 RISCV Assembly Linux RTOS Zephyr RTOS Firmware Unit Testing Code Review Hardware-Software Co-design +9 more Show less

RTL Verilog CPU Architecture Microarchitecture ASIC SoC x86 ARM Synthesis static timing *analysis DFT DFD Power Management Perl Shell Tcl Floorplan Tapeout +13 more Show less

RISC-V RTL Design Verilog VHDL Microarchitecture Python Perl Logic Design Functional Verification Waveform Debugging Instruction Fetch and Decode Branch Prediction Out-of-Order Execution +8 more Show less

CPU Architecture RTL Simulation Verilog C C++ Python Perl Performance Modeling SIMD MMU Branch Prediction Micro-architecture +7 more Show less

CPU Architecture Micro-architecture C C++ Python Perl RTL SIMD Compiler Technology OS Internals Performance Modeling Simulation Hardware Engineering +8 more Show less

C C++ ARMv8 ARMv9 RISCV Assembly Python Java Linux RTOS Zephyr RTOS Firmware Unit Testing Code Review Hardware-Software Co-design +10 more Show less

C C++ Python ARM RISC-V Firmware RTOS SoC J-TAG ICE I2C SPI PCIe CAN Ethernet USB UFS Memory Management +13 more Show less

CPU Microarchitecture ARM RISC-V x86 C C++ Python Perl SIMD Vector Architectures Real-Time Operating Systems Performance Modeling Simulation Compiler Infrastructure Power Management Signal Processing +11 more Show less

CPU Architecture Microarchitecture ARM RISC-V x86 C C++ Python Perl SIMD Vector Architectures Real-Time Operating Systems Performance Modeling Simulation Compiler Infrastructure Power Management Signal Processing +12 more Show less

Microarchitecture Performance Modeling Cycle-accurate Simulators C++ Python Workload Analysis Software Engineering Performance Profiling +3 more Show less