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Active Keyword: Senior ASIC Floorplan Design Engineer Remove filter Location: Santa Clara Remove filter Clear all

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Senior ASIC Floorplan Design Engineer

Nvidia

Santa Clara, CA +1 82 days ago $196,000–$310,500
Actively hiring Confirmed live 2 days ago High trust Above market
ASIC Floorplan Physical Design SOC CPU GPU DFT Place and Route Timing Closure Python C++ Perl Agentic AI Algorithm Development Chiplet Power/Clock/Reset Distribution
10+ yrs exp
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Senior ASIC Floorplan Design Engineer

Nvidia

Santa Clara, CA +1 113 days ago $196,000–$310,500
Actively hiring Confirmed live 2 days ago Trusted Above market
ASIC Floorplan VLSI Computer Architecture Verilog System Verilog Python Perl C/C++ CAD Physical Design Timing Closure Clock Distribution Packaging
10+ yrs exp
Save