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Active Keyword: Silicon Validation Engineer Remove filter Location: San Jose Remove filter Clear all

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Senior ASIC Engineer, Post Silicon Validation

Cisco

San Jose, CA 2 days ago $167,700–$245,200
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
ASIC Post-Silicon Validation Python C System Verilog UVM PCIe Ethernet I2C SPI JTAG DFT RTL Firmware HBM DDR Oscilloscope Traffic Generators Regression Frameworks
7+ yrs exp
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Silicon Validation Engineer

Cisco

San Jose, CA 3 days ago $167,700–$245,200
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
C C++ Python TCL ASIC Linux kernel drivers PCIE I2C Spirent IXIA SDK Emulation Lab automation Traffic-generation tools
7+ yrs exp
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Senior ASIC Engineer, Post Silicon Validation

Cisco

San Jose, CA 32 days ago
Actively hiring Confirmed live yesterday High trust
ASIC Post-Silicon Validation Python C System Verilog UVM PCIe Ethernet I2C SPI JTAG Firmware Bootloaders DFT ATE Oscilloscopes Traffic Generators HBM DDR
7+ yrs exp
Save