3rd Party IP Engineering Program Manager

Apple Inc

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Quick summary

Work type: On-site
Location: Cupertino, CA
Salary: $175,500–$311,700 / yr
Posted: 70 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k

This role $244k

$125k $332k

below market most similar roles pay here above market

This role pays more than 92% of similar roles. Most pay $154,900–$229,950 — the blue band above. At the midpoint, this role pays about $244k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · 3rd Party IP Engineering Program Manager

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The 3rd Party IP Engineering Program Manager joins the Hardware Technology Engineering organization to orchestrate the integration of external custom IPs into custom silicon designs. This role involves coordinating with engineering teams, operations, legal, and third-party vendors to ensure that external IPs meet technical, quality, and schedule requirements. Key responsibilities include tracking silicon validation schedules, managing testplan reviews, driving resolution of post-silicon issues, and facilitating data-driven decision-making across cross-functional groups. The position requires a strong technical background in analog and digital custom IP development, ASIC/SOC/VLSI designs, and silicon validation. Candidates should possess skills in Python and Perl, as well as proficiency with project management tools like Confluence and JIRA. The work focuses on managing complex dependencies and technical risks within the silicon development lifecycle.

Skills

ASIC SoC VLSI Digital Circuit Design Silicon Validation Post Silicon Debug IP Integration Python Perl JIRA Confluence

What you'll do

Coordinate high-level milestones for 3rd party IP development and integration with silicon engineering teams.
Drive resolution of technical and post-silicon issues between cross-functional teams and external IP providers.
Plan and track silicon validation schedules, testplan reviews, and specification signoffs.
Coordinate weekly meetings with vendors and IP consumers to resolve technical and schedule issues.
Assemble regular project status presentations for cross-functional executive reviews.
Manage bug tracking, issue reporting, and communication of program risks and status.
Identify project risks, develop mitigation strategies, and facilitate conflict resolution.

What we're looking for

BS in an engineering field.
10+ years of experience in Analog/Digital Circuit Design or working with Analog and/or Digital IP integration in ASIC/SOC/VLSI Designs.
Strong knowledge of the IP development process, tools, flows, methodologies, and silicon validation life cycle in a SOC.
Strong technical background in analog and/or digital custom IP development and experience with silicon validation of these IPs.
Advanced skills in Technical Program or Project Management, or Functional Management experience (preferred).
Experience working with IP vendors or IP providers (preferred).
Programming language experience in Python or Perl (preferred).
Familiarity with project management tools such as Confluence and JIRA (preferred).

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