Intern - SoC Digital Engineer

What you'll do

• Develop the digital portion of mixed-signal ICs using CMOS technologies.
• Conceive, design, and implement RF and analog circuits for SoC system integration.
• Perform RTL coding for digital and mixed-signal designs.
• Execute digital FPGA or ASIC specification, design, and physical implementation.
• Conduct silicon bring-up and debug procedures in a laboratory environment.
• Apply DSP hardware and algorithms to communication system designs.
• Utilize Cadence digital design tools and scripting languages like Python or Perl.
• Perform silicon validation using Labview or similar testing software.

What we're looking for

• Currently pursuing a BS or MS degree.
• Experience with Verilog-A/Verilog-AMS/SystemVerilog/Universal Verification Methodology (UVM) for digital or analog/mixed signal designs.
• Course and lab work in digital FPGA or ASIC specification, design, verification, physical implementation, silicon bring-up and debug.
• Course and lab work coding in RTL.
• Course and lab work with DSP hardware and/or DSP algorithms.
• Familiar with Cadence digital design tools (preferred).
• Familiar with shell and scripting languages (SKILL, Perl, Python, TCL, make, csh, bash).
• Silicon validation in the lab or experience in Labview or similar will be an asset (preferred).