below marketmost similar roles pay hereabove market
This role pays less than
52%
of similar roles. Most pay
$153,500–$216,562
— the blue band above.
At the midpoint, this role pays about
$182k
versus about
$185k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
589 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 563 roles with salary data.
The Staff RF Hardware Engineer - Device Technology joins the Si Process Packaging Solutions team to drive silicon process technology evaluation, development, design enablement, and productization for Mixed-Signal and RF products at foundry partners. This role involves driving bulk Si and RFSOI technology evaluation for RFFE designs, including receivers, transmitters, and antenna circuits. Key responsibilities include defining test structures, executing DOE, and performing layout and characterization to meet design requirements. The engineer will design, simulate, and test RF circuits to optimize process-design-layout interactions. Required skills include expertise in RF-CMOS, SOI, or BiCMOS processes, PDK details like DRC and LVS, and statistical analysis. The role addresses technical challenges in sub-micron process optimization, device modeling using BSIM and PSP-SOI, and reliability qualification for high-performance integrated circuits.
Drive bulk Si and RFSOI technology evaluation and design enablement for RFFE designs.
Define process and device requirements with design and product teams for continuous technology improvements.
Execute test structure DOE, layout, and characterization to meet specific design requirements.
Design, simulate, and test RF circuits to optimize process-design-layout interactions.
Resolve device and design optimization issues for layout, reliability, and PTE teams.
Devise testing methodologies to assure product quality and system capabilities.
Innovate new methods for device improvement and support AI-assisted workflows.
What we're looking for
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Minimum of 8+ years of industrial experience developing advanced CMOS processes and devices (preferred).
Excellent understanding of RF-CMOS, SOI, or BiCMOS process integration, reliability, design rules, and best layout practices (preferred).
Proficiency in device level test-structure development, DOE design, statistical analysis, and data-driven problem solving (preferred).
Good knowledge of RF and DC characterization of devices on wafers and in product ICs (preferred).
Good understanding of BSIM and PSP-SOI device models and ability to run hardware correlations (preferred).
ADS
HFSS
Cadence
Allegro SiP
Python
MATLAB
3D EM Co-simulation
PCB Design
Die Layout
FBAR
SAW
SOI
Spectrum Analyzers
Network Analyzers
Signal Generators
Load-pull Systems
Finite Element Modeling
Semiconductor Physics
Circuit Design
Schematic Capture
Circuit Simulation
RF
Analog
Digital
Signal Integrity
Power Integrity
Oscilloscope
Spectrum Analyzer
System on Chip
Hardware Design
DSP
Electronic Systems
Packaging
Test Solutions
Automation