Staff Implementation Engineer

Arm Holdings

Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$198,100–$268,000 / yr
Posted
3 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $233k
$140k most similar roles pay here $282k

This role pays more than 82% of similar roles. Most pay $171,375–$225,912 — the shaded band above. At the midpoint, this role pays about $233k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 40 open roles on FindRole.

Listed pay typically runs $184,500–$249,600 across 40 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · Staff Implementation Engineer

As a Solution Engineer at Arm, you will join a team developing end-to-end sign-off methodologies for highly complex multi-die SoCs and systems, focusing on timing, power, thermal analysis, and yield optimization. Your daily tasks include creating automation for accurate analysis across various domains, collaborating with foundry partners on advanced technology nodes like 3nm/2nm, and leading product-level implementation and sign-off processes. You will need expertise in EDA tool-flows, large-scale automation, and hands-on experience with Python, C, Tcl, and version control systems such as Git. The role requires deep knowledge of multi-die SoC design flows, IR and STA convergence, and the ability to integrate external EDA tools while working closely with internal teams and partners to ensure meticulous optimization of power-perf trade-offs.

What you'll do

  • Develop multi-die sign-off flow and automation for optimal Fmax and Power/GHz.
  • Create PVT-aware methodologies and flows for advanced clocking and critical path analysis.
  • Integrate innovative tools and algorithms to refine STA and IR-PDN-Thermal bottlenecks.
  • Lead product implementation and sign-off, collaborating with design teams and partners.
  • Develop large-scale automation for co-optimization of power-perf trade-offs in complex SoCs.
  • Analyze data to contribute measurably to sign-off methodology and workflow improvements.

What we're looking for

  • Extensive experience in EDA tool-flows and large-scale automation development.
  • Expertise in multi-die SoC sign-off methodology including timing, power, thermal analysis.
  • Hands-on experience with Python, C, Tcl for developing complex CAD solutions.
  • Strong background in silicon convergence, IP characterization, and RC/STA/PDN analysis.
  • Ability to lead product implementation and collaborate with design teams, foundries.
  • Proficiency in version control systems and distributed processing techniques.
  • Innovative approach to integrating statistical algorithms and machine learning methodologies.

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