Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

SpaceX

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$140,000–$190,000 / yr
Posted
today

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Competitive pay

How this pay compares to similar roles

Similar $164k
This role $165k
$122k most similar roles pay here $200k

This role pays more than 59% of similar roles. Most pay $135,000–$192,500 — the shaded band above. At the midpoint, this role pays about $165k versus about $164k for comparable roles.

Based on 237 similar postings.

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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TL;DR · Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

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As a Senior Signal and Power Integrity Engineer on Starlink’s Payload Engineering team, you will oversee signal integrity (SI) and power integrity (PI) throughout the entire lifecycle of satellite hardware. Your responsibilities include evaluating IP in silicon architecture stages, selecting stackup materials, designing channel architectures, and overseeing PCB layout. Post-manufacture, you’ll troubleshoot issues across various phases, ensuring robust design verification processes are defined and disseminated to engineers. Key technologies involve 3D EM simulation tools like CST or HFSS, high-speed digital channel simulators, and expertise in SERDES, memory interfaces, and PDNs for complex ASICs. You will collaborate with RF, antenna, mechanical, thermal, software, and production teams to architect innovative satellite products, requiring a master’s degree or PhD in electrical engineering and extensive experience in high-speed digital design and power integrity.

Skills

CST HFSS ADS Python MATLAB SPICE DDR4 LPDDR5 GPDDR6 QSPI eMMC PDN ASIC FPGA SoC EMI EMC PCB 3D_EM_Simulation High_Speed_Design

What you'll do

  • Specify, design, and verify SI and PI aspects of advanced satellite hardware.
  • Define and implement simulation workflows for SI/PI analysis in Starlink projects.
  • Architect new products by working with cross-functional engineering teams.
  • Derive top-level specifications for PCB materials and channel subcomponents.
  • Drive detailed component selection to optimize PDN designs for complex ASICs.

What we're looking for

  • 5+ years of experience designing circuits and electronic products from concept to production.
  • Extensive experience with high-speed digital design, including SERDES up to 112Gbps.
  • Proficient in specifying, analyzing, debugging high-speed memory interfaces like DDR4 and LPDDR5.
  • Expertise in designing and optimizing power delivery networks for complex ASICs and SoCs.
  • Strong background in using 3D EM simulation tools and digital channel simulators (CST, HFSS, ADS).
  • Master’s degree or PhD in electrical engineering with focus on electromagnetic theory and transmission lines.

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