Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

SpaceX

Quick summary

Work type
On-site
Location
Redmond, WA
Salary
$135,000–$195,000 / yr
Posted
today

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Competitive pay

How this pay compares to similar roles

Similar $164k
This role $165k
$122k most similar roles pay here $203k

This role pays more than 59% of similar roles. Most pay $135,000–$192,500 — the shaded band above. At the midpoint, this role pays about $165k versus about $164k for comparable roles.

Based on 237 similar postings.

Employer

About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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TL;DR · Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

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As a Senior Signal and Power Integrity Engineer on Starlink’s Payload Engineering team, you will own signal and power integrity throughout the lifecycle of satellite hardware, from initial design to production. Your responsibilities include evaluating silicon architecture, package performance, stackup material selection, channel and PDN architecture, and PCB layout oversight. You’ll also drive troubleshooting, characterization, qualification, and debug across all phases of product development. Utilizing 3D EM simulation tools like CST or HFSS and high-speed digital channel simulators, you will define design, analysis, and verification processes for the Starlink team. Essential skills include experience with advanced SERDES products, high-speed memory interfaces, and complex power delivery networks. This role requires a master’s degree or PhD in electrical engineering, extensive industry experience, and expertise in wireline transceivers and power integrity.

Skills

CST HFSS ADS Python MATLAB SPICE Allegro Altium DDR4 LPDDR5 GPDDR6 QSPI eMMC EMI EMC 3D_EM_Simulation High_Speed_Digital_Channel_Simulation Power_Delivery_Networks ASIC FPGA SoC PCB_Manufacturing Low_Loss_Laminates High_Speed_Connectors

What you'll do

  • Specify and design high-speed digital channel subcomponents for satellite hardware.
  • Define and simulate power delivery networks (PDNs) for complex ASICs and processors.
  • Troubleshoot and resolve issues in PCB manufacturing, test, and satellite integration phases.
  • Drive detailed component selection to optimize PDN designs and performance.
  • Develop best practices and simulation workflows for SI/PI across Starlink payloads.

What we're looking for

  • 5+ years of experience designing circuits and electronic products from concept to production
  • Extensive experience with high-speed digital design, including SERDES up to 112Gbps
  • Proficient in using 3D EM simulation tools like CST, HFSS, ADS for signal integrity analysis
  • Strong background in power delivery network (PDN) design and debugging complex ASICs
  • Master’s degree or PhD in electrical engineering with focus on electromagnetic theory and transmission lines
  • Experience in PCB layout oversight, material selection, and high-speed connector usage

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