SoC Interconnect Technology Team Lead

Arm Holdings

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$397,800–$538,200 / yr
Posted
73 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $220k
This role $468k
$125k most similar roles pay here $582k

This role pays more than 99% of similar roles. Most pay $190,587–$250,000 — the shaded band above. At the midpoint, this role pays about $468k versus about $220k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 106 open roles on FindRole.

Listed pay typically runs $209,100–$282,900 across 106 roles with salary data.

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At a glance

TL;DR · SoC Interconnect Technology Team Lead

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The SoC Interconnect Technology Team Lead leads a high-performing team responsible for delivering robust interconnect IP and shaping future SoC architectures. This role involves leading the architecture and development of coherent and non-coherent interconnect fabrics for complex SoCs while defining system-level strategies including topology, Quality of Service, latency, bandwidth, and power optimization. The individual will manage performance modeling, analysis, and bottleneck identification while guiding microarchitecture, RTL design, and verification strategy. Key technical requirements include expertise in AMBA AXI/ACE/CHI, CCIX, CXL, and NoC-based fabrics, alongside knowledge of cache coherency and memory hierarchy. The role addresses the challenge of creating scalable, power-efficient interconnect solutions for mobile, battery-operated, and high-performance compute systems. Candidates must possess deep experience in SoC architecture to manage cross-functional integration with CPU, GPU, NPU, and memory subsystems across various hardware platforms.

Skills

SoC Architecture Interconnect Fabrics AMBA AXI AMBA ACE CCIX CXL NoC RTL Design Cache Coherency Memory Hierarchy DVFS Silicon Bring-up Post-Silicon Validation Performance Modeling

What you'll do

  • Lead the architecture and development of coherent and non-coherent interconnect fabrics for complex SoCs.
  • Define system-level strategies including topology, Quality of Service (QoS), latency, bandwidth, and power optimization.
  • Drive the adoption and implementation of industry standards like AMBA AXI/ACE/CHI.
  • Perform performance modeling, analysis, and bottleneck identification across various use cases.
  • Guide microarchitecture, RTL design, and verification strategies for interconnect IP.
  • Lead debug and root-cause analysis for complex system-level issues.
  • Mentor and grow a team of architects and engineers.
  • Contribute to roadmap planning for next-generation SoC interconnect technologies.

What we're looking for

  • 15+ years of experience in SoC architecture/design with a focus on interconnects or system fabrics.
  • Proven track record of delivering large-scale SoCs for mobile, battery-powered, or high-performance compute platforms.
  • Deep understanding of coherent interconnect protocols such as AMBA ACE, CHI, CCIX, CXL, or similar.
  • Strong experience with non-coherent interconnects including AXI and NoC-based fabrics.
  • Expertise in performance analysis, modeling, and system trade-offs regarding latency, bandwidth, and power.
  • Solid knowledge of cache coherency, memory hierarchy, and system architecture.
  • Experience leading cross-functional teams and driving complex projects to tape-out.
  • Experience with battery-optimized SoC design, AI/ML accelerators, NoC methodologies, or post-silicon validation (preferred).

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