SerDes Micro Architect

What you'll do

• Define the microarchitecture of next-generation analog mixed-signal IPs with a focus on SERDES.
• Review firmware code, analog circuits, and digital circuits to ensure they meet performance requirements.
• Collaborate with verification teams to define expected behavior for silicon components.
• Lead debug efforts during system bring-up and factory testing phases.
• Work with signal integrity engineers to determine specific system requirements.
• Implement adaptation and optimization algorithms for high-speed receiver, transmitter, and clocking blocks.
• Perform mixed-signal modeling using Python, MATLAB, C, or C++.

What we're looking for

• A bachelor's degree is required.
• Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks (preferred).
• Deep understanding of adaptation and optimization algorithms (preferred).
• Deep understanding of communications and information theory (preferred).
• Proficiency in equalizers, timing recovery, system identification, DSP concepts, and applications (preferred).
• Familiarity with mixed-signal modeling in Python, MATLAB, C, or C++ (preferred).
• Experience in system design, performance tradeoffs, and simulation tools for analog, digital, or mixed-signal circuits (preferred).
• Familiarity with Machine Learning concepts and experience in firmware or embedded software development (preferred).