SerDes Micro Architect

Apple Inc

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Work type: On-site
Location: Austin, TX
Posted: 17 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Similar $216k

$163k most similar roles pay here $287k

This listing doesn't post a salary. Most similar roles pay $177,757–$254,750.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · SerDes Micro Architect

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The SerDes Micro Architect joins the Analog Mixed-Signal team to drive the definition of next-generation IPs. In this role, you will define the microarchitecture of analog mixed-signal IPs with a specific focus on SERDES design. Your daily responsibilities include reviewing firmware code, analog and digital circuits, and verifying that designs meet performance requirements. You will collaborate with silicon evaluation and design verification teams to define expected behavior while leading debug efforts during system bring up and factory test. You will also work with signal integrity engineers to determine system requirements. Key technical competencies include expertise in high-speed SERDES receivers, transmitters, clocking blocks, adaptation algorithms, information theory, equalizers, timing recovery, and DSP concepts. Required skills include mixed-signal modeling in Python, MATLAB, C, or C++, along with familiarity with machine learning and simulation tools for analog and digital circuits.

Skills

SERDES Mixed-Signal DSP Python MATLAB C C++ Firmware Embedded Software Machine Learning System Design Signal Integrity Information Theory

What you'll do

Define the microarchitecture of next-generation analog mixed-signal IPs with a focus on SERDES.
Review firmware code, analog circuits, and digital circuits to ensure they meet performance requirements.
Collaborate with verification teams to define expected behavior for silicon components.
Lead debug efforts during system bring-up and factory testing phases.
Work with signal integrity engineers to determine specific system requirements.
Implement adaptation and optimization algorithms for high-speed receiver, transmitter, and clocking blocks.
Perform performance trade-offs and modeling using Python, MATLAB, or C/C++.

What we're looking for

Bachelor of Science degree.
Minimum of 10 years of relevant industry experience.
Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks (preferred).
Deep understanding of adaptation/optimization algorithms, communications theory, and DSP concepts (preferred).
Proficiency in equalizers, timing recovery, system identification, and mixed-signal modeling in Python/MATLAB/C/C++ (preferred).
Experience in system design, performance tradeoffs, and simulation tools for analog, digital, or mixed-signal circuits (preferred).
Familiarity with Machine Learning concepts (preferred).
Experience in firmware or embedded software development (preferred).