Senior Hardware Test Engineer, System on Chip

General Motors (GM)

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Hybrid

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Work type
Hybrid
Location
Warren, MI
Employment
Full-time
Posted
103 days ago
Freshness
Confirmed live today

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Similar $190k
$142k most similar roles pay here $245k

This listing doesn't post a salary. Most similar roles pay $162,750–$216,250.

Based on 240 similar postings.

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About General Motors (GM)

General Motors (GM) is a leading American multinational automotive corporation founded in 1908 and headquartered in Detroit, Michigan.

General Motors (GM) currently has 168 open roles on FindRole.

Listed pay typically runs $159,200–$245,000 across 60 roles with salary data.

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At a glance

TL;DR · Senior Hardware Test Engineer, System on Chip

As a Senior Hardware Test Engineer– System on Chip within the Semiconductor Engineering team, you will lead the definition, development, and execution of hardware test strategies for state-of-the-art SoC solutions used in automotive electronics platforms. You will manage SoC and ECU board bring-up, create automated test plans, and perform systematic debugging to ensure silicon meets performance and reliability goals. Your daily work involves electrical characterization across PVT corners, developing automated test frameworks using Python or C/C++, and characterizing high-speed interfaces like DDR, PCIe, Ethernet, MIPI, and USB. You will utilize lab equipment including oscilloscopes, logic analyzers, and JTAG tools to root-cause hardware issues. This role addresses the technical challenges of validating complex digital systems, power management, and signal integrity for next-generation vehicle platforms, ensuring robust functionality from early samples through production.

What you'll do

  • Define end-to-end hardware test strategies and structured bring-up plans for SoCs and associated components.
  • Execute SoC and board-level electrical characterization testing across various PVT corners and operating modes.
  • Design, implement, and maintain automated test frameworks and scripts using Python or C/C++.
  • Develop test content and automation for high-speed interfaces including DDR, PCIe, Ethernet, and MIPI.
  • Use lab equipment like oscilloscopes and logic analyzers to characterize signals and root-cause hardware issues.
  • Translate system requirements into concrete test cases and coverage metrics in collaboration with design teams.
  • Create reusable test procedures, documentation, and checklists for multiple programs and platforms.
  • Support DV/PV and component environmental testing by defining monitoring setups and diagnostics.

What we're looking for

  • Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or a related field.
  • 7+ years of experience in hardware validation or test engineering for complex digital systems, SoCs, or high-integration ECUs.
  • Strong understanding of SoC subsystems and IP blocks from a validation and debug perspective.
  • Proven hands-on experience bringing up and testing complex digital boards including power sequencing and interface bring-up.
  • Demonstrated experience creating and executing structured hardware test plans with clear pass/fail criteria and traceability.
  • Proficiency with lab equipment such as oscilloscopes, logic analyzers, protocol analyzers, and precision power measurement tools.
  • Hands-on experience with SoC or board-level electrical characterization across PVT corners.
  • Practical experience debugging high-speed interfaces like DDR, PCIe, Ethernet, and MIPI (preferred); Master’s degree (preferred).

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