Senior Hardware Engineer (High-speed IO/Testing) (Onsite)

Cisco

Closes in 3 days

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$168,800–$241,200 / yr
Posted
1 day ago
Closes
Jun 9, 2026 (soon)

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $183k
This role $205k
$123k most similar roles pay here $254k

This role pays more than 70% of similar roles. Most pay $151,475–$213,781 — the shaded band above. At the midpoint, this role pays about $205k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 174 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 174 roles with salary data.

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View all roles at Cisco

At a glance

TL;DR · Senior Hardware Engineer (High-speed IO/Testing) (Onsite)

As a Senior High-Speed Interface Engineer at Cisco Silicon One in San Jose, CA, you will play a pivotal role in developing and testing next-generation high-speed interconnects for global data centers. Your day-to-day responsibilities include executing electrical characterization tests, supporting validation and system integration of devices, collaborating with cross-functional teams to optimize design solutions, and creating automation tools using Python or Matlab. You must have extensive experience with high-speed interface systems, RF components, and test equipment, along with strong programming skills in Python and C/C++. Additionally, familiarity with IEEE 802.3 and OIF specifications is crucial as you contribute to the development of cutting-edge ASICs for diverse network environments.

What you'll do

  • Develop and execute electrical characterization testing for high-speed interconnect devices.
  • Support validation and system integration of Silicon One devices in data centers.
  • Evaluate design tradeoffs with ASIC and signal integrity teams to optimize solutions.
  • Create automation tools for lab measurements using Python or Matlab.
  • Drive methodology development for Cisco’s high-speed solutions and platforms.

What we're looking for

  • MSEE or BSEE with 6+ years of lab experience in high-speed systems.
  • Hands-on experience with RF components and test equipment for high-speed measurements.
  • Expertise in high-speed interfaces and analog building blocks like PLL, CDR, CTLE, DFE, FFE, FEC.
  • Proficiency in Python and C/C++ programming for automation and analysis tools.
  • Strong debugging skills and knowledge of IEEE 802.3 and OIF specifications.
  • Effective communication and problem-solving abilities in a dynamic team environment.

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