Principal System Software Architect, AI/GPU Platforms

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$204,000–$306,000 / yr
Posted
140 days ago
Freshness
Confirmed live today
Closes
Aug 19, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $215k
This role $255k
$149k $323k
below market most similar roles pay here above market

This role pays more than 71% of similar roles. Most pay $169,550–$261,400 — the blue band above. At the midpoint, this role pays about $255k versus about $215k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Principal System Software Architect, AI/GPU Platforms

JOB TITLE: Principal System Software Architect, AI/GPU Platforms The Principal System Software Architect, AI/GPU Platforms joins the system software architecture team to develop next-generation, rack-scale AI platforms for MI400-class accelerators. This role involves owning the end-to-end system software architecture for subsystems including GPU memory management, scheduling, RAS, and scale-up/scale-out interconnect software models. The architect defines how the software stack exposes hardware to maximize performance and reliability for large AI and HPC deployments. Key responsibilities include driving architecture across kernel-mode drivers, user-mode runtimes, and firmware interfaces while partnering with silicon architects during pre-silicon definition. Required expertise includes Linux Memory Management, GPU/DRM driver development, and cache coherence protocols. The role addresses technical challenges in multi-GPU topologies, collective communications like RCCL, and data-center fabrics such as Infinity Fabric and Ultra Ethernet.

What you'll do

  • Own the end-to-end system software architecture for MI400-class subsystems including memory management, scheduling, and virtualization.
  • Drive architecture across the stack including kernel-mode drivers, user-mode runtimes, firmware interfaces, and the ROCm platform.
  • Partner with silicon architects during pre-silicon definition to shape hardware/software interfaces and programming models.
  • Define software strategies for multi-GPU and rack-scale topologies, including interconnects and collective communication.
  • Establish architecture for reliability, availability, and serviceability across large clusters, including error detection and telemetry.
  • Identify performance bottlenecks in the launch path and memory subsystem to define software mechanisms for optimization.
  • Produce architecture specifications and reference designs to align firmware, driver, runtime, and framework teams.
  • Translate hyperscale and AI customer workload requirements into technical architectural direction.

What we're looking for

  • Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
  • Own end-to-end system software architecture for MI400-class subsystems including memory management, scheduling, and interconnect software models.
  • Drive architecture across kernel-mode drivers, user-mode runtimes, firmware interfaces, and the ROCm software platform.
  • Partner with silicon and SoC architects during pre-silicon definition to shape hardware/software interfaces and programming models.
  • Define software strategy for multi-GPU and rack-scale topologies, including collective communication and memory coherence.
  • Establish architecture for reliability, availability, and serviceability at scale, including error detection and telemetry.
  • Linux Memory Management and Heterogeneous Memory Management (HMM) (preferred).
  • GPU/DRM driver development, cache coherence, and networking technologies like NVLink or RDMA (preferred).

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