Principal Power Systems Engineer, Snapdragon Compute Chipsets

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$211,900–$317,900 / yr
Posted
67 days ago
Freshness
Confirmed live yesterday
Closes
Jan 2, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $212k
This role $265k
$145k most similar roles pay here $336k

This role pays more than 88% of similar roles. Most pay $177,250–$245,843 — the shaded band above. At the midpoint, this role pays about $265k versus about $212k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Principal Power Systems Engineer, Snapdragon Compute Chipsets

As a Principal Power Systems Engineer: Snapdragon Compute Chipsets, you will join the PPT Systems Engineering team to lead cross-functional groups in developing innovative solutions for next-generation Snapdragon Compute Chipsets. You will be responsible for modeling SoC and chipset power, performing architecture trade-off analyses, and identifying power requirements to quantify risks. Your daily work involves optimizing hardware and software to achieve world-class low power consumption across the entire design and development cycle. You will collaborate with systems, software, silicon process, and production test teams while interacting with customers to address specific power needs for their designs. The role requires expertise in application processor, modem processor, AR/XR, machine learning networks, and mobile or computing platforms. Key technical focuses include system-level power modeling, analysis of low-power features, and optimizing performance for complex compute applications.

What you'll do

  • Perform power architecture and tradeoff analysis for Snapdragon Compute Chipsets.
  • Model, analyze, and optimize power for SoC, chipset, and platform solutions.
  • Identify power requirements and quantify potential gap or risk areas in designs.
  • Optimize the power efficiency and performance of current and future product generations.
  • Lead cross-functional teams through the design cycle to achieve specific power targets.
  • Design power features in coordination with systems, software, hardware, and silicon process teams.
  • Model customer-specific use cases and designs to address unique power requirements.
  • Communicate chipset capabilities to customers to understand and resolve their specific needs.

What we're looking for

  • A Master's degree in Electrical Engineering or a related field is required.
  • At least 10 years of professional experience in low power feature design and analysis at the SOC, chipset, or platform level is preferred.
  • Experience in system-level power modeling and analysis for mobile SOC or chipset platforms is preferred.
  • Knowledge of hardware or software design and optimization for low power features is preferred.
  • Architectural knowledge in application processors, modem processors, AR/XR, machine learning, mobile, or computing is preferred.
  • Understanding of machine learning networks for compute applications is preferred.

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