Principal Power Systems Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CAAustin, TXSanta Clara, CA
Salary
$216,600–$325,000 / yr
Posted
28 days ago
Freshness
Confirmed live today
Closes
Mar 28, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $217k
This role $271k
$147k $344k
below market most similar roles pay here above market

This role pays more than 88% of similar roles. Most pay $180,404–$253,587 — the blue band above. At the midpoint, this role pays about $271k versus about $217k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Principal Power Systems Engineer

The Principal Power Systems Engineer: Snapdragon Compute Chipsets joins the PPT Systems Engineering group to lead a cross-functional team in developing innovative power solutions for next-generation Snapdragon Compute Chipsets. This role involves guiding the end-to-end design cycle to achieve world-class low power consumption through hardware and software optimizations. Key responsibilities include power architecture tradeoff analysis, chipset and system level power modeling, and identifying power gap risks. The engineer will design power features, guide multi-function groups through design cycles, and model customer-specific use cases. Required expertise includes electrical engineering, low power feature design at the SOC or platform level, and architectural knowledge of application processors, modems, AR/XR, machine learning, and mobile computing. The work focuses on optimizing power efficiency and performance for complex compute applications and mobile systems.

What you'll do

  • Lead cross-functional teams to model SOC and chipset power and develop innovative optimization solutions.
  • Perform power architecture and tradeoff analysis for next-generation Snapdragon Compute Chipsets.
  • Conduct chipset and system-level power modeling, analysis, and optimization for platform solutions.
  • Identify power requirements and quantify specific power gaps or risk areas.
  • Optimize power efficiency and performance for current designs while architecting future products.
  • Design power features and guide multi-function groups through the design cycle to meet power targets.
  • Model power for customer-specific use cases and designs to address their specific requirements.
  • Interact with customers to advertise chipset capabilities and understand their power requirements.

What we're looking for

  • A Master’s degree in Electrical Engineering or an equivalent field is required.
  • 10 years of professional experience in low power feature analysis and design at the SOC, chipset, or platform level (preferred).
  • Architectural knowledge in application processors, modem processors, AR/XR, machine learning, mobile, or computing (preferred).
  • System knowledge of mobile SOC or chipset (preferred).
  • Experience in hardware or software design or optimizations of low power features (preferred).
  • Experience in system level power modeling and analysis (preferred).
  • Understanding of machine learning networks for compute applications (preferred).

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