Principal Hardware Software Engineer

Leidos

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Quick summary

Work type
On-site
Location
Annapolis Junction, MD
Salary
$154,050–$278,475 / yr
Employment
Full-time
Posted
2 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $198k
This role $216k
$127k $295k
below market most similar roles pay here above market

This role pays more than 72% of similar roles. Most pay $169,550–$225,500 — the blue band above. At the midpoint, this role pays about $216k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Leidos

Leidos is an industry and technology leader serving government and commercial customers with smarter, more efficient digital and mission innovations.

Leidos currently has 399 open roles on FindRole.

Listed pay typically runs $92,300–$166,850 across 331 roles with salary data.

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View all roles at Leidos

At a glance

TL;DR · Principal Hardware Software Engineer

The Principal Hardware Software Engineer joins a small team within the Intelligence Sector to support a signals analysis organization. This role involves designing, developing, constructing, and testing electronic hardware and software processing components for subsystems supporting RF communication and collection systems. The engineer will lead technical design efforts by implementing digital signal processing algorithms in FPGA hardware, ensuring timing closure, and performing resource optimization. Key responsibilities include bridging FPGA to software stack connections and integrating with existing Linux code bases. Required technical skills include FPGA coding, C, C++, and Linux OS knowledge. The position specifically utilizes Vivado and the Epiq Solution PDK to solve complex problems in signals intelligence, cryptographic key management, and mission software development within a fast-paced prototype development environment.

What you'll do

  • Design, develop, construct, and test electronic hardware and software processing components for RF communication systems.
  • Lead technical design efforts for subsystems supporting mission-critical requirements.
  • Implement DSP algorithms and associated technical components in FPGA hardware.
  • Perform FPGA RTL development, including timing closure and resource optimization.
  • Integrate FPGA code with existing Linux code bases and software stacks.
  • Develop system-level software and integration code in C and C++.
  • Document all technical design efforts and hardware/software integration processes.

What we're looking for

  • Bachelor's degree plus 8 years of relevant experience or equivalent.
  • Active TS/SCI with Polygraph.
  • Strong experience in FPGA coding and Digital Signal Processing theory and application.
  • Experience interfacing FPGA code with existing code bases and software.
  • Knowledge of signal processing blocks, related DSP components, and Linux OS.
  • Coding ability in C and C++.
  • Experience with Vivado.
  • Experience with Epiq Solution PDK (preferred).

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