Physical Design Methodology CAD Engineer

Apple Inc

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Work type
On-site
Location
—
Salary
$150,400–$277,600 / yr
Posted
15 days ago
Freshness
Confirmed live today

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Competitive pay

How this pay compares to similar roles

Similar $214k
This role $214k
$135k most similar roles pay here $293k

This role pays more than 57% of similar roles. Most pay $177,300–$250,812 — the shaded band above. At the midpoint, this role pays about $214k versus about $214k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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TL;DR · Physical Design Methodology CAD Engineer

As a Physical Design Methodology CAD Engineer within the Hardware Technology CAD team, you will develop flows, tools, and methodologies to support next-generation, high-performance, power-efficient SoC designs. You will be responsible for creating custom CAD tools for implementation and signoff, developing solutions for physical design optimization, and building workflows to enable new technology nodes and stdcells. Your daily work involves collaborating with cross-functional teams and EDA tool vendors to improve PPA and design productivity. You will specifically leverage GenAI tools to develop applications that enhance team efficiency while utilizing your knowledge of CAD algorithms and machine learning. The role requires proficiency in Tcl, Python, or Perl scripting languages, along with experience in physical design analysis such as extraction, timing, noise, physical verification, and EMIR for CPU, GPU, and Analog/Mixed Signal designs.

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Similar roles

Physical Design Methodology CAD Engineer

Apple Inc

San Diego, CA 15 days ago $142,300–$263,300
Physical Design CAD Tools Tcl Python Perl GenAI PnR STA RC Extraction EMIR Static Timing Analysis SoC Design
3+ yrs exp