High-Speed Analog & Mixed-Signal PHY Design Engineer

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$164,000–$246,000 / yr
Posted
5 days ago
Closes
Dec 7, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $183k
This role $205k
$127k most similar roles pay here $259k

This role pays more than 71% of similar roles. Most pay $156,000–$209,812 — the shaded band above. At the midpoint, this role pays about $205k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 749 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 429 roles with salary data.

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At a glance

TL;DR · High-Speed Analog & Mixed-Signal PHY Design Engineer

Qualcomm's Mixed-Signal PHY design team seeks an experienced analog and mixed-signal circuit designer to contribute to the development of next-generation SerDes PHY designs for SoCs in advanced CMOS process nodes like 7nm and beyond. This role involves working closely with a dynamic team to deliver high-speed, low-power transistor-level circuit designs and supervising physical layouts, requiring expertise in >32Gbps transceiver or clocking design. Ideal candidates possess a strong background in electrical engineering, preferably at the PhD level, with extensive experience in analog/mixed-signal integrated CMOS circuit design and technical leadership roles. Proficiency in tools such as CADENCE, SPICE, MATLAB, Verilog/VHDL is essential, alongside deep knowledge of VCO, PLL, DLL, and high-speed SERDES designs. The position demands a comprehensive understanding of industry trends and the ability to guide junior team members while ensuring alignment with stakeholder needs.

What you'll do

  • Leads design reviews and provides feedback to improve complex circuit designs for multiple blocks.
  • Oversees layout of a chip or IP block in collaboration with layout teams.
  • Defines verification plans and runs complex simulations to optimize power, performance, and functionality.
  • Designs comprehensive tests for large subsystems and ensures identification of complex bugs and issues.
  • Conducts research on industry trends to adopt best practices in analog/mixed-signal integrated circuit design.

What we're looking for

  • Bachelor's Degree in Electrical Engineering with 2+ years of analog/mixed-signal IC design experience or equivalent higher degree.
  • Experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL for circuit design.
  • In-depth knowledge of CMOS process technology nodes at 7nm and beyond.
  • Expertise in designing high-speed, low-power PHY SerDes blocks.
  • Leadership skills to guide layout teams and conduct design reviews.

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