Senior SoC Verification Methodology Engineer
Nvidia
At a glance
AI generatedJoin NVIDIA’s VLSI team as a Formal Equivalence Checking Methodology Engineer, where you’ll develop and maintain robust equivalence checking flows (FEC/FEV) across various stages of the design cycle, from RTL to GDSII. Your responsibilities include collaborating with ASIC teams to understand requirements, optimizing verification methodologies for performance and capacity, debugging issues related to constraints and coding styles, and training IP teams on formal verification techniques. You’ll need a BS in Electrical or Computer Engineering (MS preferred) with 3+ years of CAD experience, proficiency in Verilog and commercial EDA tools, scripting skills in Python or Perl, and knowledge of advanced equivalence checking methods like sequential equivalence checking and X-verification. This role is pivotal in ensuring the functional integrity of complex VLSI designs for applications in Deep Learning, AI, Robotics, Autonomous Driving, Gaming, and High Performance Computing.
Skills
What you'll do
What we're looking for
Market check
This $136,000–$218,500 range sits above 72% of similar postings on FindRole.
Peer median band
$117,000–$198,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$135,000–$183,650
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has 802 open roles on FindRole.
Listed pay typically runs $184,000–$287,500 across 798 roles with salary data.
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