ESD Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: San Francisco, CA
Salary: $184,700–$324,800 / yr
Posted: 107 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $184k

This role $255k

$123k most similar roles pay here $346k

This role pays more than 94% of similar roles. Most pay $153,766–$214,250 — the shaded band above. At the midpoint, this role pays about $255k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3518 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2727 roles with salary data.

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At a glance

TL;DR · ESD Engineer

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The ESD Engineer joins a cross-functional team to manage the ESD and Latch-Up requirements for all ICs developed by and for Apple. This role involves defining methodologies, specifying chip and IP level requirements, and designing protection devices and circuits to ensure robust designs with minimal cost to mission-mode functions. The engineer will develop test structures to characterize silicon properties, establish design rules based on characterization data, maintain an ESD device library, and manage sign-off reviews with internal teams, external vendors, and foundries. Key technical requirements include expertise in transistor device characteristics, knowledge of HBM, CDM, MM, and IEC-61000-4-2 models, and proficiency with EDA tools like Virtuoso, Calibre, Allegro, PERC, and Pathfinder. The role addresses the critical challenge of ensuring silicon is immune to ESD/EOS and latchup events across various processes including high voltage, RF, or advanced ASICs.

Skills

ESD Latch-Up Virtuoso Calibre Allegro PERC Pathfinder HBM CDM MM IEC-61000-4-2 ASIC High Voltage RF EDA Tools

What you'll do

Define ESD methodologies and specify chip and IP level requirements for all silicon developed by Apple.
Design ESD protection devices and circuits that meet specific design requirements while minimizing cost.
Develop test structures to characterize silicon for ESD and latchup properties.
Create design rules based on silicon characterization data.
Maintain an ESD device library to support internal and external design teams.
Generate or review ESD and latchup testing plans for Apple and vendor ICs.
Manage sign-off reviews with internal design teams, external vendors, and foundries.
Lead and drive ESD and latchup related debug activities.

What we're looking for

BS degree in a technical subject area and at least 10 years of relevant industry experience.
MS degree and 8+ years of relevant industry experience (preferred).
Deep understanding of transistor device characteristics (preferred).
Solid understanding of models used for testing ESD, including HBM, CDM, MM, and IEC-61000-4-2 (preferred).
Knowledge of state-of-the-art ESD circuit design techniques and topologies (preferred).
Hands-on experience with design/layout EDA tools like Virtuoso, Calibre, or Allegro (preferred).
Knowledge of ESD checking tools such as PERC and Pathfinder (preferred).
Experience with Si processes for high voltage, RF, or advanced ASICs; and experience with ESD/LUP test and characterization equipment (preferred).