ESD Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$122,700–$214,300 / yr
Posted
21 days ago
Freshness
Confirmed live today

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $185k
This role $168k
$111k most similar roles pay here $230k

This role pays less than 61% of similar roles. Most pay $153,766–$215,312 — the shaded band above. At the midpoint, this role pays about $168k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3518 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2727 roles with salary data.

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At a glance

TL;DR · ESD Engineer

As an ESD Engineer, you will join a cross-functional team focused on delivering high-quality on-chip IPs that are immune to electrostatic discharge (ESD), electrostatic overstress (EOS), and latchup events. You will take ownership of the ESD and Latch-Up requirements for all integrated circuits developed by and for Apple, ensuring silicon meets specific manufacturing requirements while maintaining minimum cost to mission-mode functions. Your daily responsibilities include defining ESD methodologies, specifying chip and IP level requirements, designing protection devices and circuits, developing test structures to characterize silicon properties, and leading debug activities. You will utilize EDA tools such as Virtuoso, Calibre, and Allegro while applying knowledge of transistor device characteristics and testing models like HBM, CDM, MM, and IEC-61000-4-2. This role addresses critical reliability challenges in semiconductor design and manufacturing.

What you'll do

  • Define the ESD methodology and specify chip and IP level requirements for all silicon developed by Apple.
  • Design ESD protection devices and circuits that meet specific design requirements while minimizing costs to mission-mode functions.
  • Develop test structures to characterize silicon for ESD and latchup properties.
  • Lead and drive debug activities related to ESD and latchup events.
  • Ensure on-chip IPs are immune to ESD, EOS, and latchup events.
  • Oversee the integration of robust ESD designs into high-quality products.

What we're looking for

  • BS degree in a technical discipline with relevant experience.
  • MS degree (preferred).
  • Deep understanding of transistor device characteristics (preferred).
  • Solid understanding of models used for testing ESD, including HBM, CDM, MM and IEC-61000-4-2 (preferred).
  • Knowledge of state-of-the-art ESD circuit design techniques and topologies (preferred).
  • Hands-on experience with design/layout EDA tools like Virtuoso, Calibre, or Allegro (preferred).
  • Experience with ESD/LUP test and characterization equipment (preferred).
  • Excellent written and verbal communication skills (preferred).

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