Device Engineer

What you'll do

• Own end-to-end yield performance across wafer sort, parametric, and final testing stages.
• Perform advanced data mining and statistical analysis to identify and mitigate yield limiters.
• Develop automated analytics pipelines using Python, JMP, and SQL to correlate electrical failures with defect data.
• Collaborate with cross-functional teams to optimize process windows and reduce manufacturing variability.
• Lead root cause investigations by correlating physical defects with electrical signatures through failure analysis.
• Execute containment and corrective actions for yield excursions during technology launch and mass production.
• Define the long-term yield roadmap, establish KPIs, and lead high-priority task forces.
• Mentor junior engineers and provide executive leadership with insights on fabrication health and risks.

What we're looking for

• Bachelor's, Master's, or PhD degree in Electrical Engineering, Materials Science, Physics, Applied Physics, or a related field.
• 5+ years of experience in semiconductor yield or process integration is preferred.
• Experience at a leading-edge fab focusing on FinFET or Gate-All-Around (GAA) architectures.
• Strong understanding of semiconductor device physics, wafer fabrication, and transistor performance.
• Knowledge of semiconductor processes including Lithography, Etch, CMP, PVD, and CVD.
• Proficiency in coding for data manipulation using Python and SQL.
• Proficiency in statistical analysis software such as Spotfire or JMP.
• Authorization to access information subject to U.S. export control laws.