Design Verification Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
—
Salary
$184,700–$324,800 / yr
Posted
17 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 98% of similar roles. Most pay $168,500–$229,100 — the shaded band above. At the midpoint, this role pays about $255k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Design Verification Engineer

As a Design Verification Engineer within the Hardware Technology organization, you will be responsible for verifying the functionality and performance of premier SOCs. Working at the heart of the chip design effort, you will collaborate with design, architecture, and software teams to review specifications and ensure quality across various subsystems like neural engines, memory controllers, and high-speed IO standards. You will develop test plans, coverage plans, and next-generation verification methodologies while defining testbenches for complex components including hardware security and networking protocols. The role requires expertise in SystemVerilog, digital simulation, and UVM methodology, alongside strong software programming skills in Python or Perl. Candidates should possess a deep understanding of computer architecture and digital design fundamentals to address corner conditions and drive test cases for diverse products like display subsystems and power management infrastructure.

What does a Design Verification Engineer earn?

Median $195800 from 78 postings across 10 companies.

See salary data

More like this

Similar roles

Design Verification Engineer

Apple Inc

San Diego, CA 17 days ago $175,000–$308,500
SystemVerilog UVM Digital Simulation Python Perl C++ Assembly Constrained Random Verification Functional Coverage Code Coverage Assertion Methodology Computer Architecture Digital Design Data Structures Algorithms PCI Express DisplayPort MIPI
10+ yrs exp

Design Verification Engineer

Apple Inc

Sunnyvale, CA 171 days ago $129,300–$225,300
UVM System Verilog Python C++ System C SVA Coverage Driven Verification LLM Prompt Engineering RTL Simulation 4G/5G 3GPP AXI AHB NoC Bus Fabric Perl Automation

Design Verification Engineer

Apple Inc

San Diego, CA 171 days ago $175,000–$308,500
UVM System Verilog Python C++ System C SVA coverage driven verification LLM RTL Simulation 3GPP AXI AHB NoC Bus Fabric Perl Prompt Engineering
10+ yrs exp