Design Verification Engineer

What you'll do

• Verify the functionality and performance of premier System-on-Chip (SoC) designs or specific IP blocks.
• Review design and architecture specifications to ensure technical requirements are met.
• Develop comprehensive test plans, coverage plans, and verification methodologies for next-generation products.
• Build and maintain complex testbenches using SystemVerilog and UVM methodologies.
• Define and execute test cases based on identified use cases and corner conditions.
• Analyze functional and performance goals to ensure effective testing of hardware components.
• Identify and resolve issues within subsystems such as memory controllers, neural engines, or high-speed I/O.

What we're looking for

• Minimum of BS degree and 10 years of relevant industry experience.
• Skilled in digital verification including constrained random, functional coverage, code coverage, and assertion methodology (preferred).
• Knowledge of SystemVerilog, digital simulation, and debug (preferred).
• Knowledge of computer architecture and digital design fundamentals (preferred).
• Good software programming skills with knowledge of data structures and algorithms (preferred).
• Experience with Python, Perl, or similar scripting languages (preferred).
• Knowledge of verification methodologies like UVM (preferred).
• Experience with C/C++ and assembly is a plus (preferred).