CPU Logic Equivalence Check Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
17 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 93% of similar roles. Most pay $168,762–$241,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · CPU Logic Equivalence Check Engineer

The CPU Logic Equivalence Check (LEC) Engineer joins the Silicon Engineering Group's gate level verification team to ensure high-performance CPU projects meet rigorous functional standards. In this multi-functional role, the engineer owns logic equivalence check and sign-off for block and top-level designs, including structural gate checks and low power checks. Day-to-day responsibilities involve developing and improving existing flows, creating scripts to automate verification runs and track results, and collaborating with design, CAD, and tool vendors to enhance methodologies for new features. The role requires expertise in digital logic design and experience with RTL-to-gate formal verification tools such as Conformal or Formality. Candidates must be proficient in at least one programming language, including TCL, Python, or Perl, while possessing knowledge of synthesis tools, Conformal ECO, and VCLP low power structural verification tools.

What you'll do

  • Own the logic equivalence check and sign-off for high-performance CPU projects.
  • Develop and improve existing flows for logical equivalence checks.
  • Execute and sign off on block and top-level logic, structural gate, and low power checks.
  • Support design teams with block-level verification runs and debugging.
  • Create scripts to automate verification runs and track results across various checks.
  • Collaborate with CAD teams to develop and enhance verification methodologies and flows.
  • Work with tool vendors to address issues and integrate new features into the workflow.

What we're looking for

  • Minimum BS degree and 10+ years of relevant industry experience.
  • Experience with at least one RTL-to-gate formal verification tool, such as Conformal or Formality.
  • Experience in digital logic design.
  • Experience with at least one programming language: TCL, Python, or Perl.
  • CPU implementation and verification experience (preferred).
  • Knowledge of LEC tools, debug techniques, Conformal ECO, and low power structural verification tools (VCLP) (preferred).
  • Working knowledge of synthesis tools and flows and Perl and TCL scripting (preferred).
  • Ability to collaborate with cross-functional RTL/PD/DFT teams to come up with custom solutions (preferred).

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