CPU Full Chip Physical Integration Engineer

As a CPU Full Chip Physical Integration Engineer, you will join the hardware team to participate in the physical design, integration, and verification of high performance, low power processor development. You will manage critical tasks including floorplan creation, area optimizations, block partitioning, pin placements, and place and route processes. Your daily work involves constructing and verifying layout databases, developing and validating Power Grids with routability analysis, and driving custom layout integration alongside EM/IR electrical verification and formal verification. To achieve signoff closure for tapeout, you will collaborate with implementation, CAD, and SOC teams while utilizing scripting in Perl or TCL to automate tasks. You will apply expertise in CMOS circuit design, STA methodology, and tools like RedHawk, Calibre, Conformal LP, and LEC to solve complex processor integration challenges.