Careers
Quick summary
- Work type
- On-site
- Location
- San Diego, CA
- Posted
- 56 days ago
- Nearby
- 99+ roles within 25 mi
Market check
Salary context
How this pay compares to similar roles
This listing doesn't post a salary. Most similar roles pay $152,075–$208,800.
Based on 239 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 660 open roles on FindRole.
Listed pay typically runs $154,000–$231,000 across 429 roles with salary data.
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At a glance
TL;DR · Careers
As an ASIC Design Verification Engineer at Qualcomm's Global SOC organization, you will join a team of top-tier engineers working on cutting-edge 5G product lines, including low-power Snapdragon chips and AI/ML applications. Your primary responsibilities include developing comprehensive verification plans, executing tests to identify design issues, and collaborating with architects and designers globally. You will leverage advanced tools and methodologies such as SystemVerilog/UVM for assertion-based verification, ensuring the quality of SOC designs from test planning through tapeout. Ideal candidates possess a strong background in CPU and ASIC design verification, along with experience in handling large-scale hardware projects and knowledge of SOC architecture components like ARM processors and AMBA buses.
Skills
What you'll do
- Develop detailed verification plans and test strategies based on design specifications.
- Execute complex verification tests using System Verilog assertions and coverage analysis.
- Innovate new verification methodologies to enhance quality and efficiency of test benches.
- Collaborate with architects and designers to resolve intricate design issues effectively.
- Maintain adherence to industry standards in verification processes and best practices.
What we're looking for
- Minimum 2+ years of ASIC design verification experience.
- Strong understanding of SystemVerilog/UVM based verification methodologies.
- Ability to develop and execute comprehensive verification plans and test cases.
- Experience in handling full verification lifecycle from planning to tapeout for large-scale hardware designs.
- Knowledge of SOC architecture, including CPU (ARM preferred), DSP, AMBA Bus, DDR, GPU, and multimedia components.
- Familiarity with heterogenous multi-die system verification and D2D interfaces like UCIe or CXL.
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