CAD Extraction Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $175,000–$308,500 / yr
Posted: 2 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k

This role $242k

$131k $327k

below market most similar roles pay here above market

This role pays more than 76% of similar roles. Most pay $168,500–$241,750 — the blue band above. At the midpoint, this role pays about $242k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3546 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2746 roles with salary data.

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At a glance

TL;DR · CAD Extraction Engineer

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As a CAD Extraction Engineer within the Silicon Engineering group, you will develop, maintain, and enhance existing parasitics extraction flows for high-performance, power-efficient system-on-chip designs. Your primary responsibilities include using efficient RC analysis skills to diagnose and debug parasitic effects, guiding design improvements for minimized parasitic impact, and ensuring RLC accuracy in post-layout simulations. You will build RC-aware or RC-driven methodologies for design optimization using EDA vendor solutions, effective scripts, and complex software. The role requires proficiency in post-layout custom design flows, including LVS and extraction, alongside experience with StarRC and Quantus tools. You will utilize Shell, Perl, Python, and TCL for script development, while applying AI technology, AIML workflows, and VSCode development to solve user issues and improve circuit performance.

Skills

RC Analysis Parasitics Extraction StarRC Quantus Python TCL Perl Shell LVS Post-layout Simulation AIML VSCode Big Data Analysis

What you'll do

Develop, maintain, and enhance existing parasitics extraction flows for silicon designs.
Use RC analysis skills to diagnose and debug parasitic effects on various designs.
Design improvements to minimize and balance parasitic impacts on circuit performance.
Ensure parasitic RLC accuracy in post-layout simulations using EDA extraction tools.
Utilize AI technology to develop quick solutions for user issues.
Create RC-aware or RC-driven methodologies for design optimization using scripts and software.
Develop sophisticated scripts using Shell, Perl, Python, and TCL.
Build Skills and Plugins using AIML workflows and VSCode development.

What we're looking for

Bachelor's degree and a minimum of 10 years of relevant industry experience.
Proficient in post-layout custom design flow, including LVS, Extraction, and Simulations (preferred).
Experience as a power user or developer with extraction tools like StarRC and Quantus (preferred).
Experience in sophisticated script development using Shell, Perl, Python, and TCL (preferred).
Familiar with AIML workflows and experience developing Skills, Plugins, and/or VSCode development (preferred).
Experience in general big data analysis (preferred).
Ability to fluently speak and write in English (preferred).
Problem-solving attitude and positive teamwork (preferred).