ASIC Physical Design Engineer

Cisco

Remote Actively hiring Verified listing
Remote, USA · Maynard, US Posted 10 days ago $135,800–$195,100 / year
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At a glance

AI generated

TL;DR

As a Physical Design Engineer at Acacia, part of Cisco, you will join a team of cross-functional experts focused on developing high-speed optical interconnect products for cloud and service providers. In this individual contributor role, your daily tasks will include leading the RTL-to-GDSII implementation flow for advanced semiconductor nodes, performing hierarchical floor planning, place and route, and conducting static timing analysis to ensure rigorous PPA targets are met. You will develop automated scripts to enhance design efficiency, collaborate with other engineering teams to resolve complex issues, and contribute to refining methodologies within the team. The ideal candidate has a strong background in ASIC physical design, experience with advanced nodes, and proficiency in tools like Cadence Innovus or Synopsys ICC2 for place and route, as well as scripting languages such as TCL, Perl, or Python.

Skills

TCL Perl Python Cadence_Innovus Synopsys_ICC2 Synopsys_Design_Complier Synopsys_Formality Cadence_Logic_Equivalence_Checker Tempus Synopsys_ICV Mentor_Calibre Static_Timing_Analysis Hierarchical_floor_planning Clock_and_power_distribution Global_signal_and_I_O_planning Physical_verification_DRC/LVS Block_level_EMIR_closure ECO_strategies RTL_to_GDSII_implementation

What you'll do

  • Implement end-to-end RTL-to-GDSII implementation for advanced semiconductor nodes.
  • Perform hierarchical floor planning and place-and-route tasks for complex designs.
  • Conduct static timing analysis to drive timing closure in multi-mode/multi-corner designs.
  • Develop automated scripts to enhance design flow efficiency and methodology.
  • Lead physical design of assigned blocks, ensuring quality and adherence to project timelines.

What we're looking for

  • Bachelor’s degree in Engineering plus 5 years of ASIC physical design experience.
  • Expertise in hierarchical floor planning and clock/power distribution for advanced nodes.
  • Proven ability to perform static timing analysis and drive timing closure for complex designs.
  • Experience with power integrity analysis on large-scale (>100M gates) designs.
  • Development and maintenance of automated scripts for efficient design flow.
  • Collaboration skills to debug and resolve physical implementation issues with cross-functional teams.

Market check

Salary context

This $135,800–$195,100 range sits above 33% of similar postings on FindRole.

Peer median band

$142,900–$219,200

Median floor and ceiling across peers.

Typical midpoint (25–75%)

$153,006–$216,250

Middle half of comparable postings.

Based on 240 comparable postings.

* 240 is the maximum number of comparable postings sampled.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 103 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 103 roles with salary data.

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