ASIC Verification Engineer - Acacia (Hybrid)
Cisco
At a glance
AI generatedThe ASIC Design Verification Technical Lead Engineer role at Acacia, a division of Cisco in Maynard, MA or Austin, TX, is for a senior technical leader responsible for verifying highly complex ASICs used in next-generation 100G-1.6T coherent optical communications products. This position requires expertise in applying sophisticated verification techniques to ensure design quality and develop process improvements while mentoring team members on advanced methodologies. Key responsibilities include leading detailed test plans, developing verification test benches, supervising timely execution of tests, collaborating with design engineers for chip-level tradeoffs, reviewing coding and coverage metrics, and implementing the latest test technologies. Candidates must have a Bachelor's or Master’s degree in Computer Science, Engineering, and at least 12 years of experience using ASIC verification methodologies, SystemVerilog/UVM, and VIP development strategies. Preferred qualifications include C++ hybrid test bench experience, formal verification tool knowledge, and a track record of innovation.
Skills
What you'll do
What we're looking for
Market check
This $189,300–$271,500 range sits above 78% of similar postings on FindRole.
Peer median band
$152,400–$241,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$166,850–$224,100
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity
Cisco currently has 113 open roles on FindRole.
Listed pay typically runs $165,000–$241,400 across 113 roles with salary data.
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