This role pays less than
81%
of similar roles. Most pay
$154,525–$216,250
— the shaded band above.
At the midpoint, this role pays about
$149k
versus about
$185k
for comparable roles.
Based on 240 similar postings.
Employer
About Cisco
Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity
Cisco currently has
134 open roles
on FindRole.
Listed pay typically runs
$168,800–$241,400
across 134 roles with salary data.
As an ASIC Design Verification Engineer at Cisco, you will join a dynamic team focused on advancing data center solutions by architecting and developing DV infrastructure for complex chips. Your daily tasks include building DV environments from scratch, creating comprehensive test plans using constraint-random and directed stimulus, ensuring robust verification coverage through code and functional implementation, and collaborating with designers and software teams to debug issues during post-silicon bring-up. You will also support design testing in emulation environments, requiring expertise in System Verilog and UVM methodology, as well as experience building scalable test benches and scripting using Perl or Python. Knowledge of protocols like PCIe, CXL, Ethernet, RDMA, DDR, or TCP is preferred, along with familiarity with formal verification tools and emulation platforms such as Veloce or Palladium.