Analog Layout Engineer

Apple Inc

Quick summary

Work type: On-site
Location: Cupertino, CA
Salary: $121,306–$213,700 / yr
Posted: 1 day ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $181k

This role $168k

$110k most similar roles pay here $225k

This role pays less than 59% of similar roles. Most pay $151,831–$209,750 — the shaded band above. At the midpoint, this role pays about $168k versus about $181k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1816 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1473 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Analog Layout Engineer

Apply Now Log in to save

As an Analog Layout Engineer at our cutting-edge hardware team, you will play a crucial role in designing and implementing complex analog circuits for high-performance semiconductor devices. Your daily tasks will include using Cadence Innovus to create efficient layout designs, developing PCells, and automating CAD processes to enhance productivity. You should have expertise in scripting languages like Python or Perl for automation, along with a strong background in electrical engineering, particularly in analog circuit design. This position requires hands-on experience in semiconductor fabrication processes and an understanding of the intricacies involved in scaling down devices while maintaining performance and reliability. Ideal candidates will possess a Master’s degree or Ph.D. in Electrical Engineering, complemented by practical industry experience.

Skills

Cadence_Innovus CAD_Automation PCell_creation

What you'll do

Design and optimize analog/mixed-signal circuit layouts to meet performance specifications.
Implement layout techniques to minimize noise and power consumption in circuits.
Create and maintain physical design rules for consistency across projects.
Develop custom cells and PCells using industry-standard tools like Cadence Innovus.
Collaborate on the development of CAD automation scripts to enhance efficiency.
Perform detailed layout verification using DRC/LVS checks to ensure accuracy.

What we're looking for

Minimum 5 years of analog/mixed-signal IC layout design experience.
Proficient in Cadence Innovus for physical implementation.
Experience with CAD automation tools and PCell creation.
Strong understanding of semiconductor fabrication processes.
MSEE or Ph.D. in Electrical Engineering or related field required.
Excellent problem-solving skills and attention to detail.
Familiarity with industry-standard design verification methodologies.

Save