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Active Keyword: Principal ASIC Design Remove filter Clear all

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Principal ASIC Design

Fortinet

Sunnyvale, CA 4 days ago $192,000–$235,000
Actively hiring Confirmed live today Posted this week High trust Competitive pay
ASIC Design SystemVerilog Verilog HDL UVM RTL Design FPGA Static Timing Analysis (STA) Logic Synthesis Lint CDC IP Integration PPA Machine Learning LLM Acceleration NPU TCP/IP Ethernet Altera AMD Xilinx
8+ yrs exp Hybrid
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AI-Driven ASIC Physical Design Principal Engineer

Cisco

San Jose, CA 64 days ago
Actively hiring Confirmed live today High trust
Python ASIC EDA Tools Innovus ICC2 Calibre Tcl Docker RAG LLM Pinecone Weaviate OpenAI API GPT-4o MLPD RTL2GDSII Tempus Primetime Redhawk Voltus Pegasus
10+ yrs exp Hybrid
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