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Mixed Signal RTL Design Engineer

Apple Inc

Sunnyvale, CA 111 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
RTL Design Verilog System Verilog Mixed-Signal LINT CDC RDC Python Perl Synthesis DFT System-Verilog assertions Scripting Physical Design Clock Domain Crossing
10+ yrs exp

Mixed Signal RTL Design Engineer

Apple Inc

Cupertino, CA 111 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday High trust Above market
RTL Design Verilog System Verilog LINT CDC RDC Python Perl Synthesis DFT System-Verilog assertions Design Verification Scripting
10+ yrs exp