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Memory PHY Principal Design Engineer

Amd

Santa Clara, CA 17 days ago $232,000–$348,000
Actively hiring Confirmed live yesterday High trust Above market
Memory PHY LPDDR DDR GDDR HBM SerDes Verilog SystemVerilog Python Perl Tcl RTL Mixed-Signal Integration Static Timing Analysis Synthesis UPF Power Optimization Silicon Bring-up Firmware Integration

Memory PHY Technical Lead

Amd

Austin, TX 41 days ago $144,800–$217,200
Actively hiring Confirmed live today High trust Below market
Mixed-Signal IP SerDes Memory PHY SoC Integration Post-Silicon Validation Signal Integrity Power Integrity FinFET RTL Python Perl UNIX HBM LPDDR DDR GDDR PCIe Ethernet USB DisplayPort HDMI MIPI ATE BERT Oscilloscope Logic Analyzer

Memory PHY Firmware Architect

Amd

Santa Clara, CA 49 days ago $205,600–$308,400
Actively hiring Confirmed live today High trust Above market
Firmware C C++ DDR LPDDR Memory PHY Pre-silicon Post-silicon Semiconductor Hardware Software Debugging