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Next-Gen High-Speed HBM LPDDR Memory Controller ASIC Digital Design Engineer

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400
Actively hiring Confirmed live today Trusted Competitive pay
ASIC Design RTL Coding Front-end Digital Design Hardware Architecture LPDDR HBM SRAM Cache Controller NoC x86 ARM Synthesis Timing Closure Gate Level Simulation Power Analysis ISA Architecture
4+ yrs exp
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Senior Principal Product Manager, Digital Footprint Control

Gen Digital

Mountain View, CA +1 54 days ago
Actively hiring Confirmed live yesterday High trust
AI GDPR CCPA iOS Android APIs data-broker operations Mobile Privacy Privacy Regulation Data Removal Tracking Protection Browser-extension Architecture Subscription Products Technical Integrations
10+ yrs exp Hybrid
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