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Active Keyword: ASIC RTL Design Remove filter Clear all

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ASIC/RTL Design Engineer for High-speed Interfaces

Qualcomm

San Diego, CA 4 days ago $140,000–$210,000
Actively hiring Confirmed live 2 days ago Posted this week High trust Below market
RTL ASIC Design SerDes DDR PCIe USB UFS MIPI VCS Fusion Compiler PrimeTime Power Compiler Spyglass Python Perl DFT STA CDC GDSII
4+ yrs exp
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Processor ASIC RTL Design Engineer

Qualcomm

San Diego, CA 127 days ago $127,200–$190,800
Actively hiring Confirmed live 3 days ago Trusted Below market
RTL system Verilog Verilog ASIC Design Logic Design Digital Design Static Timing Analysis Clock Domain Crossing Microprocessor Design Bus Interface Cache Linting LEC CLP GDS2 Synthesis
2+ yrs exp
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