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C++ Linux System Verilog RTL Synthesis Clock Tree Optimization CAD Tool Development Data Structures Algorithms Git LSF JIRA GCC VLSI Design FPGA Design Logic Design +10 more Show less

GPU Hardware Engineering Technical Documentation

3D Memory ASIC Design RTL Verilog Verilog-A Verilog-AMS C C++ Python Perl Matlab EDA Tools HBM3/4 LPDDR PCIe UCIe UAL SRAM DRAM FLASH 2.5D/3D Integration +16 more Show less

Fraud Prevention Data Science Loss Forecasting Decisioning Infrastructure Data Pipelines Content Moderation Cross-functional Collaboration +2 more Show less

ASIC Design RTL Coding HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Synthesis Timing Closure Gate Level Simulation Power Analysis Digital Design Hardware Architecture +11 more Show less

C C++ Python ARMv8 ARMv9 RISCV Assembly Linux RTOS Zephyr RTOS Firmware Unit Testing Code Review Hardware-Software Co-design +9 more Show less

Blockchain Crypto AML KYC KYB SQL AI ML SNS SQS GitHub Event-driven Architecture +7 more Show less

ASIC RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Scripting Verification Validation +4 more Show less

Power Integrity SerDes HFSS Q3D Sentinel-PSI Clarity ADS HSPICE IBIS IBIS-AMI MATLAB C++ Python Perl PCIe USB UFS MIPI +13 more Show less

SoC Architecture ARM x86 RISC V MIPS ISO 26262 IEC 61508 AUTOSAR QNX RTOS RTL Design FMEA FTA DFA FMEDA JAMA Codebeamer DOORS PCIe DDR NoC SMMU +16 more Show less