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Active Keyword: CPU Cache Microarchitect Remove filter Location: Santa Clara Remove filter Clear all

3 of up to 20 (filtered)

CPU Cache Microarchitect RTL Engineer

Apple Inc

Santa Clara, CA 16 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday High trust Above market
RTL Verilog VHDL Microarchitecture SRAM C C++ Python Perl Simulators Formal Methods DFT Coherence Protocols Interconnects Power Management
10+ yrs exp
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CPU Cache Microarchitect RTL Engineer

Apple Inc

Santa Clara, CA 16 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday High trust Competitive pay
RTL Verilog VHDL Microarchitecture SRAM C C++ Python Perl Formal Methods Simulation Emulation DFT Coherence Protocols Interconnects
3+ yrs exp
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CPU Cache Microarchitect RTL Engineer

Apple Inc

Santa Clara, CA 16 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday High trust Competitive pay
RTL Verilog VHDL Microarchitecture SRAM C C++ Python Perl Formal Methods Simulation Emulation DFT Coherence Protocols Interconnects Power Management
3+ yrs exp
Save