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Active Keyword: PLL Design Remove filter Location: San Jose Remove filter Clear all

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PLL Design Integration Staff Engineer

Amd

San Jose, CA 45 days ago $166,400–$249,600
Actively hiring Confirmed live 2 days ago High trust Competitive pay
PLL FPGA IC Design Analog/Mixed-Signal VCO LDO Phase Interpolators SystemVerilog Vivado Clock Synthesis Digital Verification Post-Silicon Validation Floor Planning
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